You can find here descriptions of HW/SW bugs. Send me Your observations, please!
- #SS is not generated in real mode on some CPUs.
- MS Windows bugs/tricks/interesting things. Contribute!
- Can be updated without notice! Last update: Aug-21-2001.
- do everything in MS Windows NT 4.0 and Windows 2000. Fixed in Q320206 (MS02-024).
- you may meet it.
Intel: Pentium II+ GD feature
- aka EliCZ’s effect II. I’ve found this bug when I was testing EDump II.
Description: When is GD bit of DR7 register set, instructions MOV from/to debug register cause EXCEPTION 1 (GD fault) EVEN IF THEY ARE EXECUTED ON CPL>0 AND NORMALLY SHOULD CAUSE EXCEPTION 13!!!!!! (like other 486+ CPUs do). Why is this feature and not a bug? Normally you cannot cause from ring-3 exception 1 due to DR access - instructions MOV from/to DR are privileged - cause exception 13. From PII (I think) exception 1 wins over exception 13 and it's possible to cause exception 1 due to DR access directly from ring-3. Thanks Intel! But it's not compatible with previous CPUs. If anyone will want I can make a test program.
Moreover #DB exception due to DRx access is not docummented in V86 mode in Intel manuals!!
AMD: K6 DRx bug - aka EliCZ’s effect. I’ve found this bug when I was testing 1st EDump.
Description: When is debugging system of AMD K6 active (the low 8 bits of DR7 register are not 0) then instruction pairs REPE/REPNE STOSB/MOVSB/INSB (opcodes F3/F2 AA/A4/6C) which overwrite themselves cause execution of NEW instruction at EIP == EIP of STOSB/MOVSB/INSB.
AMD: Debug events - (and DR6 bits settings) are not 100% compatible with Intel processors.
Run TestDRX.com or Run1st.com from Thrash.zip/filter/filter#5. If you use Emu49x from 9xEDK.zip you can test directly in Win9x.
AMD: Instruction ICEBP/ SMI (opcode F1, reserved) „generates" standard INT 1 not exception 1 like Intel. It means when you execute ICEBP in Windows you’ll get GPF. See F1-fix from EDumpall.zip.
AMD CPUs and old Pentiums: Instruction RDTSC (and probably RDPMC) - when executed from V86 mode generates GPF! See TstRDTSC from 9xEDK.zip.
TASM 5.0 - fails when it tries to translate BSF, BSR instructions or SEG?S directives.
TASM - generates ENTERW instead of ENTERD at the begin of PROCedure inside USE32 segment.
MASM - found by Liu TaoTao. MASM generates:
PUSH 0 ;!!!!!
even if you declared and defined:
Label PROTO :DWORD
Label PROC Param1
INVOKE Label, Sreg ;(Sreg= CS,DS,ES,SS,FS,GS)
Nu-Mega Soft-ICE for DOS - doesn’t support Virtual DMA Specification (other EMMs do).